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i2c-imc-skylake: validate the write path end to end

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The driver advertises SMBus byte and word writes but no write to a real
device had been exercised in this cycle. Engine-level evidence existed -- a
write to an unpopulated address returns -ENXIO with the address NACK
reported, so writes are issued rather than suppressed -- but nothing showed
a populated device accepting one.

Driven through the sibling project's CLI, which uses the framing decoded in
its own protocol notes: a 12-write frame to the LED controller at 0x27 on
both channels, latch open, effect id, brightness, three colour bytes, latch
commit. Every write acknowledged, no NACK, no interference reported, and
the device applied the result.

This also settles SMB_DIS_WRT, which is set in the documented SMBCNTL and
is SMM-writable only: it governs the documented interface, not this path.

No SPD was written at any point. The four SPD EEPROMs were verified present
with valid CRCs before and after every experiment in this cycle.
This commit is contained in:
Simone
2026-07-26 21:54:25 +02:00
parent b021fe4087
commit 87babcb166
1 changed files with 8 additions and 8 deletions
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docs/submission/cover-letter.txt
+8 -8
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@@ -149,16 +149,16 @@ Validation
on this system. on this system.
- SMBCNTL on all four iMC channels reads 0xac000000: TSOD polling - SMBCNTL on all four iMC channels reads 0xac000000: TSOD polling
disabled, TSOD_PRESENT empty. disabled, TSOD_PRESENT empty.
- Write transactions reach the bus: a byte write to an unpopulated - Writes validated end to end against a populated device: a 12-write
address returns -ENXIO with the engine reporting the address NACK, so frame to an LED controller at 0x27, across both channels, every write
the write path is issued rather than suppressed. An end-to-end write acknowledged, no NACK, and the device applied the result. A byte
to a populated device is not part of this validation; the only write to an unpopulated address returns -ENXIO with the engine
non-SPD device on the test system is an LED controller whose reads are reporting the address NACK. No SPD was written at any point, and the
themselves unreliable, and SPD writes were out of scope. four SPD EEPROMs were verified present with valid CRCs before and
after.
Still missing: an independent Tested-by, ideally on Skylake-X rather than Still missing: an independent Tested-by, ideally on Skylake-X rather than
Cascade Lake-X, suspend/resume testing with active I2C clients, and an Cascade Lake-X, and suspend/resume testing with active I2C clients.
end-to-end write to a populated device.
One note on the register interface, since a reader with the datasheet will One note on the register interface, since a reader with the datasheet will
ask. That document describes an SMBus interface on the iMC channel ask. That document describes an SMBus interface on the iMC channel