i2c-imc-skylake: retract the CF8/CFC claim, harden the state machine
v2 said firmware filters CF8/CFC config writes to this function and that
the registers are reachable only through ECAM. That was never tested; the
only evidence was the boot line "PCI: Using configuration type 1", which
names the accessor and says nothing about a write failing.
Measured on the board, driver unloaded:
# setpci -s 16:1e.5 9c.L=20085002 # read SPD 0x50 register 0x02
# setpci -s 16:1e.5 9c.L
20005002 # GO consumed by the engine
# setpci -s 16:1e.5 a8.L
0000500c # READ_DONE, no error
# setpci -s 16:1e.5 b4.L
0000000c # SPD byte 2, DDR4 type code
The command executes and returns correct data through the ordinary
accessors, and MSR_SMI_COUNT does not move across it. So the driver now
uses pci_read_config_dword() and pci_write_config_dword(), the submission
is a single patch again, and nothing in it touches the PCI core. The
cover letter retracts the claim explicitly rather than dropping it
quietly, because v2 was posted with it.
Correctness work in the same pass:
- the completion bits are latched, so a command word that never reaches
the register is indistinguishable from a completed transfer and the
caller gets the previous transaction's data. Read the command word
back and require it to be the one just written; the engine only ever
clears GO, which the measurement above shows directly;
- compare the command registers after every transfer against what the
driver left in them and fail with -EAGAIN on a mismatch. The original
iMC driver had this check and it is what makes an unarbitrated system
detectable instead of silently wrong;
- use the i2c core's suspended-adapter mechanism rather than a private
flag and -EHOSTDOWN;
- use devm_mutex_init(), drop the unnecessary pci_enable_device(), and
return -ENODEV rather than -EPERM from the default-off gate, which was
printing a driver-core error on every boot;
- mask GO when restoring a saved command word.
An earlier version of the latched-DONE check required the GO bit to be
seen set or the status word to change. That was wrong: repeated transfers
with the same outcome leave STATUS bit for bit identical, and GO is
consumed faster than a config read-back can observe it. It produced false
positives on 3 of 15 smoke-test items before being replaced.
Add Documentation/i2c/busses/i2c-imc-skylake.rst, which every other PC
SMBus driver has and which was asked for on the 2020 iMC thread, and the
tools/ scripts for the hardware measurements: probe-cf8-write.sh and
probe-cf8-transaction.sh produced the result above, dump-pcu-config.sh is
the search for a TSOD polling control, watch-engine.sh is the firmware
activity measurement.
Smoke test on the X299 system with the current module: 15 checks, 0
failures, dmesg clean.
This commit is contained in:
@@ -31,14 +31,8 @@ Patch series v2 is archived on
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[lore.kernel.org](https://lore.kernel.org/linux-i2c/[email protected]/T/#t)
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and received no replies.
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The next posting is an RFC in **two patches**:
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1. a PCI/x86 change adding `pci_mmcfg_read_config()` / `pci_mmcfg_write_config()`,
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which force config access through the memory-mapped (ECAM) path;
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2. this driver, which uses them.
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The split exists because those are two decisions belonging to two different
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sets of maintainers. See [docs/submission/cover-letter.txt](docs/submission/cover-letter.txt).
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The next posting is `[PATCH v4]`, a single patch. See
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[docs/submission/cover-letter.txt](docs/submission/cover-letter.txt).
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**No iMC I2C driver has ever been merged into mainline.** Andy Lutomirski's
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`i2c_imc` (2013-2016) and Stefan Schaeckeler's 2020 Broadwell rewrite both
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@@ -47,21 +41,29 @@ either; it detects it. See the cover letter for what that means in practice.
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---
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## Why the ECAM path
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## Retracted: the CF8/CFC claim
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The engine's registers are at config offsets `0x9C`-`0xB8`, inside the first
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256 bytes. On x86 that range is dispatched to `raw_pci_ops`, which is CF8/CFC
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whenever configuration type 1 is usable; the memory-mapped path is only used
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from `0x100` upwards. On the tested X299 board a dword written through CF8/CFC
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to the command register does not take effect: the register reads back
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unchanged, the GO bit is never consumed, no transaction is issued. The same
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write through ECAM works.
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Up to v3 this project claimed that firmware filters CF8/CFC config writes to
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the PCU function, and that the registers were reachable only through the
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memory-mapped window. **That was wrong.** It was never tested directly; the
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only evidence was a boot log line naming the access method.
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What drops the write is **not known**. Earlier revisions of this project
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attributed it to System Management Mode; the only evidence was a boot log line
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naming the access method, which says nothing about who filters the write, so
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that claim has been removed. [tools/probe-cf8-write.sh](tools/probe-cf8-write.sh)
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is there to settle it with an `MSR_SMI_COUNT` measurement.
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Measured on this board, driver unloaded:
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```console
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# setpci -s 16:1e.5 9c.L=20085002 # read SPD 0x50, register 0x02
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# setpci -s 16:1e.5 9c.L
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20005002 # GO consumed
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# setpci -s 16:1e.5 a8.L
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0000500c # READ_DONE, no error
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# setpci -s 16:1e.5 b4.L
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0000000c # SPD byte 2: DDR4 type code
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```
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The command executes and returns correct data through the ordinary accessors,
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and `MSR_SMI_COUNT` does not move across it. The driver now uses
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`pci_read_config_dword()` and `pci_write_config_dword()` like any other driver.
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Reproduce with [tools/probe-cf8-transaction.sh](tools/probe-cf8-transaction.sh).
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---
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@@ -73,9 +75,9 @@ is there to settle it with an `MSR_SMI_COUNT` measurement.
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of the transfer, restores both afterwards;
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* **compares the command registers after every transfer** against what it left
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in them, and fails with `-EAGAIN` if anything else changed;
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* requires a positive sign that the engine accepted the command, because the
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done bits are latched and would otherwise let a never-executed command look
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like a completed one.
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* reads the command word back and requires it to be the one just written,
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because the done bits are latched and a stale DONE would otherwise let a
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command that never reached the register look like a completed transfer.
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If your log shows
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@@ -125,14 +127,6 @@ make reload ALLOW_UNSAFE=1 # load for testing, after checking arbitration
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sudo make install # install into the kernel tree
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```
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The driver calls `pci_mmcfg_read_config()`, which is added by patch 1 of the
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upstream series and is not in any released kernel yet. When the target kernel
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lacks it, the build force-includes
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[compat/pci-mmcfg-compat.h](compat/pci-mmcfg-compat.h), which reimplements the
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two accessors out-of-tree so the driver source stays byte-identical to the
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submitted patch. The build prints a warning when the shim is in use. The shim
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is **not** part of the upstream submission.
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To permit a later `modprobe` or PCI modalias load:
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```bash
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Reference in New Issue
Block a user