Files
i2c-imc-skylake/docs
Simone 7bac49b4f6 i2c-imc-skylake: harden the checks for the v4 respin
All of this came out of a self-review of v3 plus one robot report; none
of it changes what the driver supports.

The read-back check required the whole command word to come back as
written, and the interference check on the driven channel compared
against the pre-transfer word.  Both implicitly demanded that every
undocumented bit of the command register reads as zero, which held on
the test system but is not something to assume across steppings.
Compare only the bits this driver produces, with the post-write
read-back as the baseline for the driven channel; GO clearing remains
the single permitted difference.

Read the result before the interference check, not after, so the check
also covers the window in which the data latch is read.

Re-run the TSOD-polling check on resume and keep the adapters suspended
if firmware enabled polling across suspend; the probe-time refusal
cannot see that, and the S3 observation in the cover letter is exactly
this scenario.

Stop before writing a saved command word back if the config read that
fetched it had already failed.

Rename the register accessors: the command register is CMD and the data
latch DATA.  v3 called the command register DATA and the data latch
CTRL, which read backwards.

Cast ~COMMAND_OUR_BITS to u32 in the interference check.  BIT() and
GENMASK() are unsigned long, so the complement was computed in 64 bits
and truncated on assignment; the truncated value was already correct,
this only silences a clang W=1 -Wconstant-conversion warning.
Reported-by: kernel test robot <[email protected]>
Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

The Kconfig help and the .rst now say that PCI ID 8086:2085 also
matches Skylake-SP / Cascade Lake-SP servers, where a BMC is far more
likely to own the engine, and the .rst states plainly that jc42 itself
has not been run here, only the transactions it needs.
2026-07-29 10:45:53 +02:00
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