Simone
2c7675a104
P2 asked whether the ENE at 0x27 has readable state. The answer had been reached twice by elimination, and the last link in that chain was a comment in a third party's patched OpenRGB detector, not a measurement of ours. probe-ene-receive-byte.sh runs the experiment the driver made possible on 2026-07-27, when PNTR_SEL (BIT(18)) gave us a bare Receive Byte: a read with no command byte on the wire cannot return a transform of a register that was never sent. It does, however, return the last command byte the chip received — 12/12 on both channels — so the value is still ours, not the device's. A Receive Byte taken from 0x31 after addressing 0x27 answers 0xff instead of the echo, which places the latch in the device and not in the iMC engine; empty addresses NACK, so the transaction is real. Everything here is read-only: Receive Byte and Read Byte Data at 0x27, SPD reads through ee1004 sysfs, and the four SPD serials compared before and after every run. Two engine behaviours the script has to work around, both measured: the first transaction on a channel answers with a stale value (hence the discarded warm-up read), and a read following a successful one usually NACKs, which one retry always clears — the P1 policy, confirmed. lore-thread-check.py is unrelated to the probe but shares the same motive: lore and patchwork now sit behind an Anubis bot check, so a shell cannot tell "not published" from "not allowed to look". The NNTP mirror can.
63 lines
2.2 KiB
Plaintext
63 lines
2.2 KiB
Plaintext
== P2 Receive Byte probe at 0x27 — 2026-08-10T18:27:12+02:00
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driver: /lib/modules/7.0.0-28-generic/updates/dkms/i2c-imc-skylake.ko.zst
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rounds per channel: 8
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-- SPD baseline
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ch0.dimm0=50E4333A
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ch0.dimm1=1FE43236
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ch1.dimm0=50E434BA
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ch1.dimm1=1EE433B5
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-- ch0 (i2c-1) — artefact map, read_byte_data(reg)
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reg value N>>2 N>>3 N-1 closer
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0x00 0x00 0x00 0x00 0xff NACK
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0x01 0x00 0x00 0x00 0x00 0x00
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0x02 0x00 0x00 0x00 0x01 NACK
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0x03 0x00 0x00 0x00 0x02 0x00
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0x04 0x01 0x01 0x00 0x03 NACK
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0x08 0x02 0x02 0x01 0x07 NACK
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0x0f 0x03 0x03 0x01 0x0e 0x03
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0x10 0x04 0x04 0x02 0x0f NACK
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0x11 0x04 0x04 0x02 0x10 0x04
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0x20 0x08 0x08 0x04 0x1f NACK
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0x21 0x02 0x08 0x04 0x20 NACK
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0x40 0x10 0x10 0x08 0x3f NACK
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0x41 0x10 0x10 0x08 0x40 0x10
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0x80 0x20 0x20 0x10 0x7f NACK
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0xa0 0x28 0x28 0x14 0x9f NACK
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0xa1 0x28 0x28 0x14 0xa0 0xe8
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0xaf 0xeb 0x2b 0x15 0xae 0xeb
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0xe1 0xf8 0x38 0x1c 0xe0 0xf8
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0xec 0xfb 0x3b 0x1d 0xeb NACK
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0xff 0x3f 0x3f 0x1f 0xfe 0xff
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-- ch1 (i2c-2) — artefact map, read_byte_data(reg)
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reg value N>>2 N>>3 N-1 closer
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0x00 0x00 0x00 0x00 0xff NACK
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0x01 0x00 0x00 0x00 0x00 0x00
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0x02 0x00 0x00 0x00 0x01 NACK
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0x03 0x00 0x00 0x00 0x02 0x00
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0x04 0x01 0x01 0x00 0x03 NACK
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0x08 0x02 0x02 0x01 0x07 NACK
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0x0f 0x03 0x03 0x01 0x0e 0x03
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0x10 0x04 0x04 0x02 0x0f NACK
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0x11 0x02 0x04 0x02 0x10 NACK
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0x20 0x02 0x08 0x04 0x1f NACK
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0x21 0x08 0x08 0x04 0x20 0x08
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0x40 0x10 0x10 0x08 0x3f NACK
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0x41 0x10 0x10 0x08 0x40 0x10
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0x80 0x20 0x20 0x10 0x7f NACK
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0xa0 0x28 0x28 0x14 0x9f NACK
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0xa1 0x28 0x28 0x14 0xa0 0xe8
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0xaf 0xfa 0x2b 0x15 0xae 0xeb
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0xe1 0xf8 0x38 0x1c 0xe0 0xf8
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0xec 0xfb 0x3b 0x1d 0xeb NACK
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0xff 0x0f 0x3f 0x1f 0xfe 0xff
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-- SPD after
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ch0.dimm0=50E4333A
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ch0.dimm1=1FE43236
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ch1.dimm0=50E434BA
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ch1.dimm1=1EE433B5
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SPD integrity: OK (4/4 serials unchanged)
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