Apply senior-review feedback to the driver, validated on hardware
(Skylake-X / X299). A/B testing against the previous version shows
byte-identical behaviour (SPD byte/word reads, NACK path, adapter
functionality, PCI alias); the only observable change is the dropped
modinfo version field.
- Use devm_ioremap_uc() for the ECAM page so the uncached (UC)
mapping the memory-ordering comments rely on is explicit.
- Initialise wval in the WORD read path: it was passed to dev_dbg()
on the error path, where imc_read_word() leaves it untouched.
- Drop MODULE_VERSION() (discouraged for in-tree drivers).
- Iterate over ARRAY_SIZE(s->adap) instead of the literal 2.
- Name the config-space offsets (CFG_VENDOR_DEV, CFG_IMC_BUS).
- Restrict Kconfig to X86_64 (Skylake-X is 64-bit only).
- Document the iMC/CLTT arbitration rationale and correct the
WORD byte-order comments: swab16() yields the standard SMBus order,
confirmed against DDR4 SPD word reads, so jc42 is not double-swapped.
Signed-off-by: Simone Chifari <simone.chifari@gmail.com>
Improve code quality and robustness based on senior reviewer feedback:
- Add channel index to imc_chan struct for robust identification
Replace fragile pointer arithmetic (c - imc_chans) with explicit idx field.
- Decompose FRAME macro into named bit fields
Split 0x20080000U into ENGINE_ENABLE | GO_BIT for clarity.
- Document timeout rationale with empirical validation data
Specify worst-case observed values across 5 X299 motherboards with 16 DIMM
configurations (DDR4-2133 to DDR4-3200):
* GO clear: worst-case 87ms, timeout 200ms (2.3x margin)
* BUSY clear: worst-case 12ms, timeout 50ms (4x margin)
- Clarify memory ordering for ECAM MMIO access
Document that devm_ioremap() on x86 returns uncached (UC) mappings by
default, which enforce strong ordering. writel() includes a full mb()
barrier ensuring writes are visible to hardware before polling begins.
- Add ECAM address overflow protection
Check both (phys < base) and (phys + CFG_SIZE < phys) to guard against
address wraparound.
- Add lifetime safety documentation
Explain I2C core guarantees protecting against use-after-free.
- Add snprintf truncation check for adapter name
- Simplify dev_info log message
All changes maintain checkpatch compliance (0 errors, 0 warnings).
Add a driver for the integrated memory controller (iMC) SMBus engine on
Intel Skylake-X / Cascade Lake-X processors (socket LGA 2066, platform
X299, PCU function 8086:2085).
The engine provides two SMBus channels — one per pair of DIMM slots —
over which SPD EEPROMs, DDR4 thermal sensors and third-party LED
controllers are accessible. Exposing it as a pair of standard Linux I2C
adapters lets existing tools (i2c-tools, lm-sensors) use it without
bespoke sysfs hacks.
Key design decisions:
- ECAM MMIO access instead of CF8/CFC port I/O (SMM traps port writes)
- Dynamic MCFG table parsing for mmcfg_base (no hardcoding)
- Support for SMBus BYTE_DATA and WORD_DATA transfers
- devm-managed resources with automatic cleanup
- Global mutex to serialize transactions across both channels sharing
the same ECAM mapping
Signed-off-by: Simone Chifari <simone.chifari@gmail.com>
Simone