Simone
d074cc7c07
Plugin: ns7zip v2.0.0 Architectures: x86-ansi, x86-unicode, amd64-unicode License: LGPL-2.1-or-later
59 lines
1.4 KiB
C++
59 lines
1.4 KiB
C++
// BranchRegister.cpp
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#include "StdAfx.h"
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#include "../Common/RegisterCodec.h"
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#include "BranchMisc.h"
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namespace NCompress {
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namespace NBranch {
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#ifdef Z7_EXTRACT_ONLY
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#define GET_CREATE_FUNC(x) NULL
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#define CREATE_BRA_E(n)
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#else
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#define GET_CREATE_FUNC(x) x
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#define CREATE_BRA_E(n) \
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REGISTER_FILTER_CREATE(CreateBra_Encoder_ ## n, CCoder(Z7_BRANCH_CONV_ENC_2(n)))
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#endif
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#define CREATE_BRA(n) \
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REGISTER_FILTER_CREATE(CreateBra_Decoder_ ## n, CCoder(Z7_BRANCH_CONV_DEC_2(n))) \
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CREATE_BRA_E(n)
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CREATE_BRA(BranchConv_PPC)
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CREATE_BRA(BranchConv_IA64)
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CREATE_BRA(BranchConv_ARM)
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CREATE_BRA(BranchConv_ARMT)
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CREATE_BRA(BranchConv_SPARC)
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#define METHOD_ITEM(n, id, name) \
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REGISTER_FILTER_ITEM( \
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CreateBra_Decoder_ ## n, GET_CREATE_FUNC( \
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CreateBra_Encoder_ ## n), \
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0x3030000 + id, name)
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REGISTER_CODECS_VAR
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{
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METHOD_ITEM(BranchConv_PPC, 0x205, "PPC"),
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METHOD_ITEM(BranchConv_IA64, 0x401, "IA64"),
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METHOD_ITEM(BranchConv_ARM, 0x501, "ARM"),
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METHOD_ITEM(BranchConv_ARMT, 0x701, "ARMT"),
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METHOD_ITEM(BranchConv_SPARC, 0x805, "SPARC")
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};
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REGISTER_CODECS(Branch)
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#define REGISTER_FILTER_E_BRANCH(id, n, name, alignment) \
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REGISTER_FILTER_E(n, \
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CDecoder(Z7_BRANCH_CONV_DEC(n), alignment), \
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CEncoder(Z7_BRANCH_CONV_ENC(n), alignment), \
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id, name)
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REGISTER_FILTER_E_BRANCH(0xa, ARM64, "ARM64", 3)
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REGISTER_FILTER_E_BRANCH(0xb, RISCV, "RISCV", 1)
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}}
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